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(R)
X9015
Low Noise, Low Power, Volatile
Data Sheet August 31, 2006 FN8157.5
Single Digitally Controlled (XDCPTM) Potentiometer
The Intersil X9015 is a 32 tap potentiometer that is volatile. The device consists of a string of 31 resistors that can be programmed to connect the RW/VW wiper output with any of the nodes between the connecting resistors. The connection point of the wiper is determined by information communicated to the device on the 3-wire port. The 3-wire port changes the tap position by a falling edge on the increment pin. The direction the wiper moves is determined by the state of the up/down pin. The wiper position at power up is Tap #15. The X9015 can be used in a wide variety of applications that require a digitally controlled variable resistor to set analog values.
Features
* 32 taps * Three-wire up/down serial interface * VCC = 2.7V-5V * Operating ICC = 50A max. * Standby current = 1A max. * RTOTAL = 10k, 50k * Packages 8 Ld SOIC, 8 Ld MSOP * Pb-free plus anneal available (RoHS compliant)
Pinout
SOIC/MSOP INC U/D RH/VH VSS 1 2 X9015 3 4 6 5 8 7 VCC CS RL/VL RW/VW
Block Diagram
VCC (Supply Voltage)
U/D INC CS
5-Bit Up/Down Counter
31 30 29 One 28 of Thirty Two Decoder 2
RH/VH
Up/Down (U/D) Increment (INC) Device Select (CS) Control
RH/VH
RW/VW
RL/VL
Transfer Gates
Resistor Array
VSS (Ground) General VCC VSS Control Circuitry 1 0 RL/VL RW/VW Detailed
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
X9015 Ordering Information
PART NUMBER X9015WS8T1 X9015WS8ZT1 (Note) X9015UM8 X9015UM8Z (Note) X9015UM8I* X9015UM8IZ* (Note) X9015US8* X9015US8Z* (Note) X9015US8I* X9015US8IZ* (Note) X9015WS8-2.7* X9015WS8Z-2.7* (Note) X9015UM8-2.7* X9015UM8Z-2.7* (Note) X9015UM8I-2.7* X9015UM8IZ-2.7* (Note) X9015US8-2.7* X9015US8Z-2.7* (Note) X9015US8I-2.7* X9015US8IZ-2.7* (Note) PART MARKING X9015W X9015W Z ABB DCF ABD DCD X9015U X9015U Z X9015U I X9015U Z I X9015W F X9015W ZF ABC DCF ABE DCE X9015U F X9015U ZF X9015U G X9015U ZG 50 2.7-5.5 10 50 VCC LIMITS (V) 5 10% RTOTAL (k) 10 TEMPERATURE RANGE (C) 0 to +70 0 to +70 0 to +70 0 to +70 -40 to +85 -40 to +85 0 to +70 0 to +70 -40 to +85 -40 to +85 0 to +70 0 to +70 0 to +70 0 to +70 -40 to +85 -40 to +85 0 to +70 0 to +70 -40 to +85 -40 to +85 PACKAGE 8 Ld SOIC Tape and Reel 8 Ld SOIC (Pb-free) Tape and Reel 8 Ld MSOP 8 Ld MSOP (Pb-free) 8 Ld MSOP 8 Ld MSOP (Pb-free) 8 Ld SOIC 8 Ld SOIC (Pb-free) 8 Ld SOIC 8 Ld SOIC (Pb-free) 8 Ld SOIC 8 Ld SOIC (Pb-free) 8 Ld MSOP 8 Ld MSOP (Pb-free) 8 Ld MSOP 8 Ld MSOP (Pb-free) 8 Ld SOIC 8 Ld SOIC (Pb-free) 8 Ld SOIC 8 Ld SOIC (Pb-free) PKG. DWG. # M8.15 M8.15 M8.118 M8.118 M8.118 M8.118 M8.15 M8.15 M8.15 M8.15 M8.15 M8.15 M8.118 M8.118 M8.118 M8.118 M8.15 M8.15 M8.15 M8.15
* Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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FN8157.5 August 31, 2006
X9015 Pin Descriptions
RH/VH and RL/VL
The high (RH/VH) and low (RL/VL) terminals of the X9015 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RL/VL and RH/VH references the relative position of the terminal in relation to wiper movement direction selected by the U/D input, and not the voltage potential on the terminal. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. The electronic switches on the device operate in a "make before break" mode when the wiper changes tap positions. If the wiper is moved several positions, multiple taps are connected to the wiper for tIW (INC to VW change). The RTOTAL value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. When the device is powered-down, the wiper position is lost. When power is restored, the wiper is set to Tap #15.
RW/VW
RW/Vw is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. The position of the wiper within the array is determined by the control inputs. The wiper terminal series resistance is typically 200 at VCC=5V. At power up the wiper position is at Tap #15. (VL/RL=Tap #0).
Instructions and Programming
The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS set LOW the device is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a five bit counter. The output of this counter is decoded to select one of thirty two wiper positions along the resistive array. The system may select the X9015, move the wiper and deselect the device. The new wiper position will be maintained until changed by the system or until a power-up/down cycle. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move the wiper up and down until the proper trim is attained.
Up/Down (U/D)
The U/D input controls the direction of the wiper movement and whether the tap position is incremented or decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input.
Chip Select (CS)
The device is selected when the CS input is LOW. When CS is returned HIGH while the INC input is also HIGH the X9015 will be placed in the low power standby mode until the device is selected once again.
Mode Selection
CS L INC U/D H L H H X L X X X MODE
Pin Names
SYMBOL RH/VH RW/VW RL/VL VSS VCC U/D INC CS High terminal Wiper terminal Low terminal Ground Supply voltage Up/Down control input Increment control input Chip select control input DESCRIPTION
Wiper up Wiper down Standby mode Standby mode Normal mode Wiper Up (not recommended) Wiper Down (not recommended)
L
L
L L
H L
Principles Of Operation
There are two sections of the X9015: the input control, counter and decode section; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. The resistor array is comprised of 31 individual resistors connected in series. 3
FN8157.5 August 31, 2006
X9015
Absolute Maximum Ratings
Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-65C to +135C Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Voltage on CS, INC, U/D, VH, VL and VCC with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V V = |VH-VL| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . +300C IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7.5mA
Operating Conditions
Temperature Range Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to +70C Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C Supply Voltage (VCC) X9015. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V 10% X9015-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
)
Potentiometer Specifications Over recommended operating conditions unless otherwise stated
SYMBOL RTOTAL VVH VVL PARAMETER End to End Resistance Variation VH/RH Terminal Voltage VL/RL Terminal Voltage Power Rating RW RW IW Wiper Resistance Wiper Resistance Wiper Current Noise Resolution Absolute Linearity (Note 1) Relative Linearity (Note 2) RTOTAL Temperature Coefficient Ratiometric Temperature Coefficient CH/CL/CW Potentiometer Capacitances See circuit #3 10/10/25 Vw(n)(actual)-Vw(n)(expected) Vw(n+1)-[Vw(n)+MI] -1 -0.2 300 20 Ref: 1kHz RTOTAL 1k IW = 1mA, VCC = 5V IW = 1mA, VCC = 2.7V -3.75 -120 3 +1 +0.2 200 400 TEST CONDITIONS/NOTES MIN. -20 0 0 TYP. MAX. +20 VCC VCC 10 400 1000 3.75 UNIT % V V mW mA dBV % MI (Note 3) MI (Note 3) ppm/C ppm/C pF
Power Up and Down Requirements
The are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins provided that VCC is always more positive than or equal to VH, VL, and VW, i.e., VCC VH, VL, VW. The VCC ramp rate spec is always in effect.
NOTES: 1. Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage = (Vw(n)(actual)-Vw(n)(expected)) = 1 Ml Maximum. 2. Relative Linearity is a measure of the error in step size between taps = VW(n+1) - [Vw(n) + Ml] = 0.2 Ml. 3. 1 Ml = Minimum Increment = RTOT/31. 4. Typical values are for TA = +25C and nominal supply voltage. 5. This parameter is periodically sampled and not 100% tested.
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FN8157.5 August 31, 2006
X9015
)
D.C. Operating Specifications Over recommended operating conditions unless otherwise specified
SYMBOL ICC1 ICC2 ISB ILI VIH VIL CIN (Note 5) PARAMETER VCC active current (increment) VCC active current (Store) (EEPROM Store) Standby supply current CS, INC, U/D input leakage current CS, INC, U/D input HIGH voltage CS, INC, U/D input LOW voltage CS, INC, U/D input capacitance VCC = 5V, VIN = VSS, TA = 25C, f = 1MHz TEST CONDITIONS CS = VIL, U/D = VIL or VIH and INC = 0.4V @ max. tCYC CS = VIH, U/D = VIL or VIH and INC = VIH @ max. tWR CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V VIN = VSS to VCC VCC x 0.7 -0.5 MIN. TYP. (Note 4) MAX. 50 400 1 10 VCC + 0.5 VCC x 0.1 10 UNITS A A A A V V pF
TEST CIRCUIT #1
TEST CIRCUIT #2
CIRCUIT #3 SPICE MACRO MODEL
VH/RH
VH/RH Test Point RH CH
RTOTAL CW 25pF 10pF RW CL 10pF RL
VS
Test Point VW/RW VL/RL V L /RL VL
VW VW/RW Force Current
Symbol Table
WAVEFORM INPUTS Must be steady May change from Low to High May change from High to Low Don't Care: Changes Allowed N/A OUTPUTS Will be steady Will change from Low to High Will change from High to Low Changing: State Not Known Center Line is High Impedance
A.C. Conditions of Test
Input pulse levels Input rise and fall times Input reference levels 0V to 3V 10ns 1.5V
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FN8157.5 August 31, 2006
X9015
A.C. Operating Specifications Over recommended operating conditions unless otherwise specified
SYMBOL tCl tlD tDI tlL tlH tlC tCPH tCPH tIW tCYC tR, tF (Note 7) tPU(Note 7) CS to INC setup INC HIGH to U/D change U/D to INC setup INC LOW period INC HIGH period INC inactive to CS inactive CS deselect time (NO STORE) CS deselect time (STORE) INC to Vw change INC cycle time INC input rise and fall time Power up to wiper stable 0.2 5 4 500 5 50 10 PARAMETER MIN. 100 100 2.9 1 1 1 100 10 1 5 TYP. (Note 6) MAX. UNIT ns ns s s s s ns ms s s s s V/ms ms
tR VCC(Note 7) VCC power-up rate tWR Store cycle
A.C. Timing
CS tCYC tCI INC tIL tIH tIC
(store) tCPH 90% 10% 90%
tID
tDI
tF
tR
U/D tIW VW MI (8)
NOTES: 6. Typical values are for TA = +25C and nominal supply voltage. 7. This parameter is periodically sampled and not 100% tested. 8. MI in the A.C. timing diagram refers to the minimum incremental change in the VW output due to a change in the wiper position.
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FN8157.5 August 31, 2006
X9015 Performance Characteristics (Typical)
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200
NOISE (dB)
FREQUENCY (kHz)
FIGURE 1. TYPICAL NOISE
10000 9800 9600 9400
RTOTAL
9200 9000 8800 8600 8400 8200 8000
-55
-45
-35
-25
-15
-5
5
15
25
TEMPERATURE
35
45
55
65
75
85
95
105 115 125 C
FIGURE 2. TYPICAL RTOTAL VS. TEMPERATURE
0
-50
-100
-150
PPM
-200
-250
-300
-350 -55
-45
-35
-25
-15
-5
5
15
TEMPERATURE
25
35
45
55
65
75
85
95
105
115
125
C
FIGURE 3. TYPICAL TOTAL RESISTANCE TEMPERATURE COEFFICIENT
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FN8157.5 August 31, 2006
X9015 Performance Characteristics (Typical) (Continued)
800
700
600
500
RW ()
400
300
200
100
0
0
2
4
6
8
10
12
14
16
TAP
18
20
22
24
26
28
30
32
VCC = 2.7V
FIGURE 4. TYPICAL WIPER RESISTANCE
40.0% 30.0%
ABSOLUTE% ERROR
20.0% 10.0% 0.0% -10.0% -20.0% -30.0% -40.0% 0 3 6 9 12 15 18 21 24 27 30
Tap FIGURE 5. TYPICAL ABSOLUTE% ERROR PER TAP POSITION
20.0% 15.0%
RELATIVE% ERROR
10.0% 5.0% 0.0% -5.0% -10.0% -15.0% -20.0%
0
3
6
9
12
15
18
21
24
27
30
TAP FIGURE 6. TYPICAL RELATIVE% ERROR PER TAP POSITION
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FN8157.5 August 31, 2006
X9015 Applications Information
Electronic digitally controlled potentiometers provide two powerful application advantages: (1) the variability and reliability of a solid-state potentiometer, and (2) the flexibility of computer-based digital controls.
Basic Configurations of Electronic Potentiometers
VR VH/RH VW/RW VR
VL/RL
I THREE-TERMINAL POTENTIOMETER; VARIABLE VOLTAGE DIVIDER
TWO-TERMINAL VARIABLE RESISTOR; VARIABLE CURRENT
Basic Circuits
Buffered Reference Voltage R1 +V +5V VW/RW VREF + - -5V VOUT = VW (a) (b) OP-07 VOUT +V R1 VW/RW VW/RW X Cascading Techniques +V +V VS + - -5V Noninverting Amplifier +5V LM308A VO
R2
VO = (1+R2/R1)VS
VOLTAGE REGULATOR
OFFSET VOLTAGE ADJUSTMENT
COMPARATOR WITH HYSTERESIS
VIN
317 R1
VO (REG)
R1 VS 100k -
R2 VS LT311A - + VO TL072 VO
Iadj R2 10k 10k VO (REG) = 1.25V (1+R2/R1)+Iadj R2 +12V -12V 10k
+
VUL = {R1/(R1+R2)} VO(max) VLL = {R1/(R1+R2)} VO(min)
(FOR ADDITIONAL CIRCUITS, SEE AN115.)
} R1
} R2
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FN8157.5 August 31, 2006
X9015 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45 H 0.25(0.010) M BM
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 5.80 0.25 0.40 8 8 0 8 MAX 1.75 0.25 0.51 0.25 5.00 4.00 6.20 0.50 1.27 NOTES 9 3 4 5 6 7 Rev. 1 6/05
MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497 0.2284 0.0099 0.016 8 0
MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574 0.2440 0.0196 0.050
B C D E e H
C
A1 0.10(0.004)
0.050 BSC
1.27 BSC
e
B 0.25(0.010) M C AM BS
h L N
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
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FN8157.5 August 31, 2006
X9015 Mini Small Outline Plastic Packages (MSOP)
N
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
E1 -BE
INCHES SYMBOL A
ABC
MILLIMETERS MIN 0.94 0.05 0.75 0.25 0.09 2.95 2.95 4.75 0.40 8 0.07 0.07 5o 0o 15o 6o MAX 1.10 0.15 0.95 0.36 0.20 3.05 3.05 5.05 0.70 NOTES 9 3 4 6 7 Rev. 2 01/03
MIN 0.037 0.002 0.030 0.010 0.004 0.116 0.116 0.187 0.016 8 0.003 0.003 5o 0o
MAX 0.043 0.006 0.037 0.014 0.008 0.120 0.120 0.199 0.028
INDEX AREA
12 TOP VIEW
0.20 (0.008)
A1 A2
4X
0.25 (0.010) GAUGE PLANE SEATING PLANE -C-
R1 R
b c D E1
A
A2
4X
L L1
e E L L1 N R
0.026 BSC
0.65 BSC
A1
-He D
b
0.10 (0.004) -A0.20 (0.008)
C
SEATING PLANE
0.037 REF
0.95 REF
C a C L E1
C
R1 0
SIDE VIEW
15o 6o
-B-
0.20 (0.008)
CD
END VIEW
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-187BA. 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. Dimension "D" does not include mold flash, protrusions or gate burrs and are measured at Datum Plane. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions and are measured at Datum Plane. - H - Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. Formed leads shall be planar with respect to one another within 0.10mm (0.004) at seating Plane. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Datums -A -H- . and - B - to be determined at Datum plane
11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 11
FN8157.5 August 31, 2006

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